1. Field of the Invention
The present invention is related to a communication system for transmitting voice and/or data signals. In particular, the present invention relates to method and apparatus for increasing the signal transmission speed in modem communications systems using synchronization and bit robbing techniques.
2. Description of the Related Art
Traditional modem standards assume that both ends of a modem session have an analog session to the public switched telephone network. Data signals are converted from digital to analog and back again, thus limiting transmission speeds to 33.6 Kbps with V.34 modems. Further, due to limitations of the public switched telephone network, the theoretical maximum transmission speed is approximately 35 Kbps.
The V.90 technology approaches data transmission in a different mannerxe2x80x94that one end of the modem session has a pure digital connection to the phone network and takes advantage of that high speed digital connection. Indeed, by viewing the public switched telephone network as a digital network, V.90 technology is able to accelerate data downstream from the Internet to end user""s computer at speeds of up to 56 Kbps. It should be noted, however, that due to existing regulations on maximum permissible power levels during download transmissions, while the V.90 modems can receive data at speeds of up to 56 Kbps, in practice, the actual maximum speed is limited to 54 Kbps.
Data speeds approaching the ideal speed of 56 Kbps can be delivered downstream to the Customer Premise Equipment (CPE) using encoding schemes such as 128 Pulse Amplitude Modulation (PAM). Presently available CPE equipment can be configured to decode the 128 PAM encoding scheme and achieve data speeds approaching 56 Kbps. However, there are several factors that may reduce this transmission rate. For example, to achieve as close to the ideal data transmission speed of 56 Kbps, the connections from the Internet Service Provider (ISP) must be in the form of digital transmission, the analog phone line from the switch to the CPE must have a satisfactory signal-to-noise (S/N) ratio, and there must be no additional analog-to-digital (A/D) conversions between the Central Office (CO) switch and the CPE. The switch referred to herein is provided as the connection between the telephone company interface to the customer via a port on a switch network such as the 5ESS (#5 Electronic Switching System). This port can be analog or digital, and for plain old telephone service (POTS) system, it is generally analog. This switch connects the analog port to other analog ports or to digital devices such as a T1 line for routing the signals carried thereon to other offices.
For example, in the case of a communications system requiring additional A/D conversions, by virtue of the additional A/D conversions required in the system, the data transmission speed is reduced to a rate below 30 Kbps. More specifically, Shannon""s theorem provides that because of quantization noise introduced by the additional A/D conversions in the communication systems, the ideal data transmission speed of 56 Kbps is limited to the theoretical speed of 33.6 Kbps due to the sampling rate and the noise floor of the conversion process as mandated by Shannon""s theorem for an 8 bit A/D converter used in telecommunications devices. In particular, the 33.6 Kbps limit occurs because the incoming analog signal which contains the encoded digital data as quantization steps on the waveform cannot be accurately recovered and transmitted transparently over the intermediate digital link. Further detail regarding Shannon""s theorem can be found in 56 Kbps Data Transmission across the PSTN, available as of Oct. 14, 1998 at the following URL:
http://www.conexant.com/pressroom/whitepapers (Oct. 14, 1998).
FIG. 1 illustrates an eight line copper fed subscriber carrier system available from GoDigital Networks Corporation of Fremont Calif., the assignee of the present invention, a detailed description of which is provided in an application entitled Multiple Digital Subscriber Carrier With Drop and Insert Repeater System concurrently filed herein which claims priority under 35 USC xc2xa7119 to provisional application No. 60/121,011 filed on Feb. 22, 1999, the disclosures of each of which are incorporated in its entirety herein by reference.
As shown, a Central Office switch 101 located at the Central Office Site receives an incoming digital signal transmitted at a rate of 56 Kbps from an Internet Service Provider (ISP). The Central Office switch, among others, decodes the digital signal received from the ISP using a standard commercially available digital-toanalog (D/A) converter such as the D/A converter 107 shown in FIG. 1, and transmits the decoded signal to the Central Office Terminal Unit (CTU) 102 of the subscriber line carrier system for each of the eight channels shown in FIG. 1. Each of the decoded signals received at the CTU 102 from each of the eight channels is then encoded using an analog-to-digital (A/D) converter 108 in the CTU 102.
The digitized signal is then transmitted from the CTU 102 to a Remote Terminal Unit (RTU) 104 via a single bi-directional twisted copper pair 103. At the RTU 104, the reverse process as that in the CTU 102 is performed. In other words, the received digital signal is decoded by a D/A converter 109 at the RTU 104, and each of the decoded signals are transmitted to the respectively linked subscriber line to user remote terminals. For example, the decoded signals from the RTU 104 may be provided to a 56 Kbps modem 105 which is further coupled to a telephone line or a computer 106 located at a user""s residence or office.
In the system described above and shown in FIG. 1, as previously discussed, because of the quantization noise introduced by the additional A/D conversion at the Central Office Terminal Unit 102 in the subscriber loop between the Central Office switch 101 and the Customer Premise Equipment (CPE) including the 56 Kbps modem 105 and the telephone or the computer 106 located at the user""s site, the transmission speed is limited to at most 33.6 Kbps. More specifically, the resulting limitation on the signal (or data) transmission speed is due to the sampling data and the noise floor of the conversion process.
Presently, there are no known economical approaches to increase the data transmission speed when passing the encoded data through an additional A/D conversion process at the communications equipment between the Central Office switch and the CPE as discussed above.
Presently available 56K modems from U.S. Robotics, for example, which can be used at the CPE implements digital signal processing (DSP) techniques to recover the network clock, can also provide compensation for the deterioration in the analog loop characteristics (such as signal level and phase) between the Central Office switch and the CPE up to a distance of 12 Kft of the twisted copper pair and any digital or analog pads which may be located in the signal transmission path. The digital or analog pads (depending upon its location in the network) refer to lossy elements that are inserted into the telephone network to reduce signal levels. These pads are generally used to reduce the possibility of poor balance (i.e., the hybrid balance at a 4W to 2W point) and can result in noisy data transmission. For example, in a digital system, a T1 is a 4-wire (4W) system and when this digital signal is converted to an analog signal at the CO switch 101, it passes through a 4W-2W (2-wire) hybrid as required to place the signal on a 2 wire circuit.
However, for pair gain systems using multiple voice channels over a single twisted copper cable pair, the approach set forth above for each transmission line would be cost prohibitive due to the requirement for the eight channels, for example, in the eight line copper fed subscriber carrier system, to be provided with a customized digital signal processor (DSP) and a unique 16 bit A/D converter suitable for use with all eight subscriber lines. Alternatively, each subscriber line can be provided with a separate dedicated DSP, but this would significantly increase the cost of the system.
Typically, the additional A/D conversion process occurs in close proximity to the CO switch (for example, within 100 ft from the CO switch). Further, due to this proximity, the signal loss and phase variation is minimal between these two points. With a cost effective approach to recover the encoded digital data from the incoming analog signal, the data transmission speed can be increased above the theoretical limit of 33.6 Kbps since additional introduction of quantization noise can be avoided. Therefore, a cost effective system which can provide an increase in signal transmission speed above the 33.6 Kbps transmission rate with an additional A/D conversion process in the loop is desirable.
In view of the foregoing, in accordance with the present invention, there are provided method and apparatus for providing a cost effective voice and/or data communications system with high transmission speed exceeding the 33.6 Kbps rate of the modems in communications systems with the use of synchronization and/or bit robbing techniques.
In particular, in accordance with one embodiment of the present invention, there is provided a communication system, comprising: a codec interface for encoding an analog signal received a central office switch and generating a digital signal; a clock configured to receive a network clock signal from the central office switch and to generate a master clock signal, wherein the master clock signal is synchronized to the network clock signal; and a framer coupled to the codec interface for receiving the digital signal from the codec interface, the framer further coupled to the clock for receiving the synchronized master clock signal; wherein the codec interface is configured to encode the analog signal in accordance with the synchronized master clock signal.
In accordance with another embodiment of the present invention, there is provided a communication system, comprising: a codec interface for encoding an analog signal to generate-an encoded digital signal; a clock configured to receive a network clock signal from a central office switch and to generate a master clock signal, wherein the master clock signal is synchronized to the network clock signal; and a framer coupled to the codec interface for receiving the encoded digital signal, and coupled to the clock for receiving the synchronized master clock signal, wherein the framer further includes: a first register for storing the encoded digital signal; a second register for storing signaling information; a transmit buffer for temporarily storing a first portion of the encoded digital signal; an overhead buffer for temporarily storing either a second portion of the encoded digital signal or the signaling information; and a framer clock for synchronizing the first and second registers, the transmit buffer and the overhead buffer to the synchronized master clock signal; wherein when there is no signaling information change in the second register, the first portion of the encoded digital signal is multiplexed with the second portion of the encoded digital signal, and further, when there is signaling information change in the second register, the first portion of the encoded digital signal is multiplexed with the signaling information.
In accordance with yet another embodiment of the present invention, there is provided a method of providing a communication system, comprising the steps of: encoding an analog signal and generating a digital signal; receiving a network clock signal and generating a master clock signal; synchronizing the master clock signal to the network clock signal; and receiving the digital signal generated at the encoding step and the synchronized master clock signal; wherein the step of encoding includes encoding the analog signal in accordance with the synchronized master clock signal.
In accordance with still yet another embodiment of the present invention, there is provided a method of providing a communication system, comprising the steps of: encoding an analog signal and generating an encoded digital signal; receiving a network clock signal and generating a master clock signal, wherein the master clock signal is synchronized to the network clock signal; latching the encoded digital signal in a first register; latching signaling information in a second register; temporarily storing a first portion of the encoded digital signal in a first buffer; temporarily storing either a second portion of the encoded digital signal or the signaling information in a second buffer; synchronizing the first and second registers and the first and second buffers with the synchronized master clock signal; wherein when there is no signaling information change in the second register, multiplexing the first portion of the encoded digital signal with the second portion of the encoded digital signal, and further, when there is signaling information change in the second register, multiplexing the first portion of the encoded digital signal with the signaling information.
These and other features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings.